Application-specific integrated circuits (ASICs), have been supplanted more and more by integrated circuits (ICs) that can be programmed to fulfill multiple functions. There are now many various programmable logic architectures, including, for example, programmable logic devices (“PLDs”), programmable logic arrays (“PLAs”), complex programmable logic devices (“CPLDs”), field programmable gate arrays (“FPGAs”) and programmable array logic (“PALs”). Although there are differences between these various architectures, each of the architectures typically include a set of input conductors coupled as inputs to an array of logic whose outputs, in turn, act as inputs to another portion of the logic device. Complex Programmable Logic Devices (“CPLDs”) are large scale PLDs that, like many programmable architectures, are configured to the specific requirements of an application by programming.
Previously, a device was programmed once for a specific function which would be its only function for its lifetime. Each of these architectures, though, has begun to be implemented in a reprogrammable form. A programmable logic device can now be re-programmed while in operation and can fulfill the functions of many different devices. One of the more complex reprogrammable devices is the programmable single-chip system, which can be implemented as any of a number of devices, anywhere from simple logic gates to those as complex as microcontrollers.
The complexity of a programmable device, most particularly a programmable single-chip system, requires complex programming of each of its configurations which can be stored. Each stored configuration reprogramming can be accomplished “on the fly” by applying the stored configuration to the device.
Initial programming of a highly complex device, though, can be tedious and time consuming. Numerous tools have been developed to aid the programmer in forming each configuration necessary to each device. However, even with current configuration tools, a programmer must track a very large number of lines of programming and device characteristics in order to properly establish a complex device configuration.
Complex device configurations require the establishment of numerous connections between functional blocks or user modules within the programmable device. User modules are the building blocks of an end configuration. In other graphical configuration tools, in order to determine allowed interconnections, a graphical representation of a wire was connected between a pin, an output for example, and an input to another functional user module, then displayed in the graphical user interface of a computer-aided configuration tool. The validity of the connection was only verifiable in complex simulation or in actual device usage, both of which are time-consuming and expensive.
Another method has been to apply an on-screen label to a selected pin's parameter list. Then any other allowed connection would also have that same label, in its parameter list, in what could become a very complex graphical image. Each potential interconnection then would have to have its parameters polled to determine its allowability.
Both of these methods have a problem in that searching for the set of allowed connections for a given pin is laborious and error-prone. It is very difficult for a user to determine the entire set of allowable connections for a pin if a wire trace needs to be performed, or if each label needs to be manually scanned, for each allowable connection.
Configuration errors are often found only in simulation of the end configuration or in actual device testing. By the time these stages are reached, the complexity of the configuration task can have an error source buried deep in configuration code.
A need exists, therefore, for a method for improving and streamlining the interconnection configuration of highly complex programmable devices to perform the functions required of each programmed device configuration. Furthermore, such a method must be user-friendly, enabling a user of normal skills to rapidly configure enormously complex programmable devices with multiple configurations.